CSET
Conditional Set sets the destination register to 1 if the
condition is TRUE, and otherwise sets it to 0.
This is an alias of
CSINC.
This means:
-
The encodings in this description are named to match the encodings of
CSINC.
- The description of CSINC gives the operational pseudocode, any constrained unpredictable behavior, and any operational information for this instruction.
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| sf | 0 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | != 111x | 0 | 1 | 1 | 1 | 1 | 1 | 1 | Rd |
| op | S | | Rm | cond | | o2 | Rn | |
Assembler Symbols
| <Wd> |
Is the 32-bit name of the general-purpose destination register, encoded in the "Rd" field.
|
| <invcond> |
Is one of the standard conditions, excluding AL and NV, encoded with its least significant bit inverted, and
encoded in
cond :
| cond |
<invcond> |
Description |
| 0000 |
NE |
Maps to <cond> EQ.
|
| 0001 |
EQ |
Maps to <cond> NE.
|
| 0010 |
CC |
Maps to <cond> CS.
|
| 0011 |
CS |
Maps to <cond> CC.
|
| 0100 |
PL |
Maps to <cond> MI.
|
| 0101 |
MI |
Maps to <cond> PL.
|
| 0110 |
VC |
Maps to <cond> VS.
|
| 0111 |
VS |
Maps to <cond> VC.
|
| 1000 |
LS |
Maps to <cond> HI.
|
| 1001 |
HI |
Maps to <cond> LS.
|
| 1010 |
LT |
Maps to <cond> GE.
|
| 1011 |
GE |
Maps to <cond> LT.
|
| 1100 |
LE |
Maps to <cond> GT.
|
| 1101 |
GT |
Maps to <cond> LE.
|
|
| <Xd> |
Is the 64-bit name of the general-purpose destination register, encoded in the "Rd" field.
|
Operation
The description of CSINC gives the operational pseudocode for this instruction.
Operational information
If PSTATE.DIT is 1:
-
The execution time of this instruction is independent of:
-
The values of the data supplied in any of its registers.
-
The values of the NZCV flags.
-
The response of this instruction to asynchronous exceptions does not vary based on:
-
The values of the data supplied in any of its registers.
-
The values of the NZCV flags.
Internal version only: aarchmrs v2024-03_relA, pseudocode v2024-03_rel, sve v2024-03_rel
; Build timestamp: 2024-03-26T09:45
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