BFloat16 floating-point dot product (vector, by element). This instruction delimits the source vectors into pairs of BFloat16 elements.
If FEAT_EBF16 is not implemented or FPCR.EBF is 0, irrespective of the other control bits in the FPCR, this instruction:
If FEAT_EBF16 is implemented and FPCR.EBF is 1, then this instruction:
The BFloat16 pair within the second source vector is specified using an immediate index. The index range is from 0 to 3 inclusive. ID_AA64ISAR1_EL1.BF16 indicates whether this instruction is supported.
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
0 | Q | 0 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | L | M | Rm | 1 | 1 | 1 | 1 | H | 0 | Rn | Rd |
if !HaveBF16Ext() then UNDEFINED; integer n = UInt(Rn); integer m = UInt(M:Rm); integer d = UInt(Rd); integer i = UInt(H:L); integer datasize = if Q == '1' then 128 else 64; integer elements = datasize DIV 32;
<Vd> |
Is the name of the SIMD&FP destination register, encoded in the "Rd" field. |
<Ta> |
Is an arrangement specifier,
encoded in
|
<Vn> |
Is the name of the first SIMD&FP source register, encoded in the "Rn" field. |
<Tb> |
Is an arrangement specifier,
encoded in
|
<Vm> |
Is the name of the second SIMD&FP source register, encoded in the "M:Rm" fields. |
<index> |
Is the immediate index of a pair of 16-bit elements in the range 0 to 3, encoded in the "H:L" fields. |
CheckFPAdvSIMDEnabled64(); bits(datasize) operand1 = V[n, datasize]; bits(128) operand2 = V[m, 128]; bits(datasize) operand3 = V[d, datasize]; bits(datasize) result; for e = 0 to elements-1 bits(16) elt1_a = Elem[operand1, 2*e+0, 16]; bits(16) elt1_b = Elem[operand1, 2*e+1, 16]; bits(16) elt2_a = Elem[operand2, 2*i+0, 16]; bits(16) elt2_b = Elem[operand2, 2*i+1, 16]; bits(32) sum = Elem[operand3, e, 32]; sum = BFDotAdd(sum, elt1_a, elt1_b, elt2_a, elt2_b, FPCR[]); Elem[result, e, 32] = sum; V[d, datasize] = result;
Internal version only: isa v33.53, AdvSIMD v29.11, pseudocode v2022-09_rel, sve v2022-09_rel ; Build timestamp: 2022-09-30T16:37
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